Non-volatile memory is a necessary part of numerous data processing systems and the like. The memory holds the state of the machine, programs, and data during periods in which the machine and the memory are not powered. Memories based on rotating magnetic disks provide the least expensive read-write non-volatile memory. However, such mechanical memories are relatively slow to read and write. The speed of data storage and retrieval is determined by the latency time for the portion of the disk having the desired data to be positioned under the read/write heads and the speed with which the disk rotates.
Non-volatile memories based on EEPROM architectures substantially eliminate the latency period and parallel read-write designs have also reduced the read-write times in such memories. However, EEPROM memories are still much slower than conventional DRAM or SRAM memories. In addition, the cost of these memories per bit is still an order of magnitude higher than DRAM.
Non-volatile memories based on ferroelectric materials hold the promise of improving both the cost and speed of non-volatile memory. A conventional ferroelectric memory cell uses a capacitor with a ferroelectric dielectric to store data. The data is stored by altering the polarization of the ferroelectric dielectric. In the simplest form, a ferroelectric capacitor with the dielectric completely polarized in one direction represents a data value of “0” and the ferroelectric capacitor with the dielectric completely polarized in the other direction represents a “1”. The data value is stored by applying a voltage across the ferroelectric capacitor that is sufficient to fully polarize the dielectric in the desired direction. The stored data value is read by applying a voltage in a direction that fully polarizes the ferroelectric capacitor in a predetermined direction and measuring the charge that flows from the ferroelectric capacitor. If the ferroelectric capacitor was already polarized in the predetermined direction very little charge moves between the plates of the ferroelectric capacitor; however, if the ferroelectric capacitor was polarized in the opposite direction a much larger charge flows between plates.
The cost of a ferroelectric memory could be significantly reduced if the number of bits of data that can be stored in a ferroelectric capacitor can be increased beyond the above described binary storage cells. The initial attempts to store multiple states in a single ferroelectric capacitor used programming voltages that were less than the voltages needed to fully polarize the ferroelectric capacitor. In these schemes, the ferroelectric capacitor is first reset to a fully polarized state by applying a reset voltage. The ferroelectric capacitor is then subjected to an intermediate voltage in the opposite direction to partially polarize the ferroelectric capacitor. The magnitude of the programming voltage depends on the data value that is to be stored. To read the ferroelectric capacitor, the ferroelectric capacitor is again subjected to the reset voltage and the amount of charge that leaves the ferroelectric capacitor is measured. The amount of charge that flows from the capacitor should allow the stored data value to be determined. Unfortunately, the amount of charge that flows depends on the hysteresis curve for the ferroelectric capacitor. The hysteresis curves vary significantly from ferroelectric capacitor to ferroelectric capacitor due to fabrication variations, the previous programming history of the ferroelectric capacitor, and temperature. Hence, the same programming voltage applied to different ferroelectric capacitors in a memory leads to different charges being stored.
In U.S. Pat. No. 7,990,749, which is incorporated in its entirety by reference, an improved analog ferroelectric memory is described in which the ferroelectric capacitors are programmed by converting the data value to be stored to a charge that depends only on the data value. This charge is then forced into the ferroelectric capacitor. Because of the variations in the hysteresis loops of the ferroelectric capacitors, the different ferroelectric capacitors will be in different states of polarization. However, when the ferroelectric capacitor is reset, the charge that leaves the ferroelectric capacitor will be the same as the charge that was forcibly stored provided the temperature of the ferroelectric capacitor at readout is the same as the temperature of the ferroelectric capacitor at programming, and hence, the variations in the hysteresis loop due to fabrication variation and programming history are substantially reduced.